|
Base2Designs
Downloads
|
|
|
Microsoft Windows utility for use with USB2Flash. Use for formatting FPGA configuration files, and downloading files to target hardware flash memory. Full documentation for the Base2Designs FPGA Configuration scheme. Minimal OpenRISC implementation targeted to Altera NIOS Development Kit Cyclone edition. Perl utilities for converting binary object files to plain hex files, and hex files into formats that can be used to initialize Xilinx and Altera internal RAM. Perl utility for creating FPGA pin-out assignments, and Verilog/VHDL port assignments from an Eagle netlist. Free tools and projects provided by others Icarus Verilog, a free Verilog simulator GTKwave, a graphical waveform viewer for viewing VCD files generated by HDL simulators such as Icarus Verilog Serge Vakulenko's minimal OpenRISC implementaion for the Xilinx Spartan-3E Starter Kit. ASICS.WS Perl utility for generating top level Verilog module. |
|
Send mail to
sfielding@base2designs.com with
questions or comments about this web site.
|